mirror of
https://github.com/Feliix42/ssd1675.git
synced 2024-11-23 11:16:30 +00:00
Remove Chip Select Pin
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parent
17941a99a3
commit
83066b1013
2 changed files with 10 additions and 20 deletions
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@ -63,11 +63,11 @@ fn main() -> Result<(), std::io::Error> {
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// https://pinout.xyz/pinout/inky_phat
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// Configure Digital I/O Pins
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let cs = Pin::new(8); // BCM8
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cs.export().expect("cs export");
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while !cs.is_exported() {}
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cs.set_direction(Direction::Out).expect("CS Direction");
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cs.set_value(1).expect("CS Value set to 1");
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//let cs = Pin::new(8); // BCM8
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//cs.export().expect("cs export");
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//while !cs.is_exported() {}
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//cs.set_direction(Direction::Out).expect("CS Direction");
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//cs.set_value(1).expect("CS Value set to 1");
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let busy = Pin::new(17); // BCM17
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busy.export().expect("busy export");
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@ -92,7 +92,7 @@ fn main() -> Result<(), std::io::Error> {
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// Initialise display controller
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let mut delay = Delay {};
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let controller = ssd1675::Interface::new(spi, cs, busy, dc, reset);
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let controller = ssd1675::Interface::new(spi, busy, dc, reset);
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let mut black_buffer = [0u8; ROWS as usize * COLS as usize / 8];
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let mut red_buffer = [0u8; ROWS as usize * COLS as usize / 8];
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@ -80,12 +80,9 @@ pub trait DisplayInterface {
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/// // Build the interface from the pins and SPI device
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/// let controller = ssd1675::Interface::new(spi, cs, busy, dc, reset);
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#[allow(dead_code)] // Prevent warning about CS being unused
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pub struct Interface<SPI, CS, BUSY, DC, RESET> {
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pub struct Interface<SPI, BUSY, DC, RESET> {
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/// SPI interface
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spi: SPI,
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/// CS (chip select) for SPI (output)
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cs: CS,
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/// Active low busy pin (input)
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busy: BUSY,
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/// Data/Command Control Pin (High for data, Low for command) (output)
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@ -94,19 +91,17 @@ pub struct Interface<SPI, CS, BUSY, DC, RESET> {
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reset: RESET,
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}
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impl<SPI, CS, BUSY, DC, RESET> Interface<SPI, CS, BUSY, DC, RESET>
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impl<SPI, BUSY, DC, RESET> Interface<SPI, BUSY, DC, RESET>
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where
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SPI: hal::blocking::spi::Write<u8>,
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CS: hal::digital::v2::OutputPin,
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BUSY: hal::digital::v2::InputPin,
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DC: hal::digital::v2::OutputPin,
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RESET: hal::digital::v2::OutputPin,
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{
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/// Create a new Interface from embedded hal traits.
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pub fn new(spi: SPI, cs: CS, busy: BUSY, dc: DC, reset: RESET) -> Self {
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pub fn new(spi: SPI, busy: BUSY, dc: DC, reset: RESET) -> Self {
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Self {
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spi,
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cs,
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busy,
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dc,
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reset,
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@ -114,9 +109,6 @@ where
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}
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fn write(&mut self, data: &[u8]) -> Result<(), SPI::Error> {
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// Select the controller with chip select (CS)
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// self.cs.set_low();
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// Linux has a default limit of 4096 bytes per SPI transfer
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// https://github.com/torvalds/linux/blob/ccda4af0f4b92f7b4c308d3acc262f4a7e3affad/drivers/spi/spidev.c#L93
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if cfg!(target_os = "linux") {
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@ -134,11 +126,9 @@ where
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}
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}
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impl<SPI, CS, BUSY, DC, RESET> DisplayInterface for Interface<SPI, CS, BUSY, DC, RESET>
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impl<SPI, BUSY, DC, RESET> DisplayInterface for Interface<SPI, BUSY, DC, RESET>
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where
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SPI: hal::blocking::spi::Write<u8>,
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CS: hal::digital::v2::OutputPin,
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CS::Error: Debug,
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BUSY: hal::digital::v2::InputPin,
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DC: hal::digital::v2::OutputPin,
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DC::Error: Debug,
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