Remove Chip Select Pin

This commit is contained in:
Felix Suchert 2022-07-31 21:13:01 +02:00
parent 17941a99a3
commit 83066b1013
Signed by: feliix42
GPG key ID: 24363525EA0E8A99
2 changed files with 10 additions and 20 deletions

View file

@ -63,11 +63,11 @@ fn main() -> Result<(), std::io::Error> {
// https://pinout.xyz/pinout/inky_phat
// Configure Digital I/O Pins
let cs = Pin::new(8); // BCM8
cs.export().expect("cs export");
while !cs.is_exported() {}
cs.set_direction(Direction::Out).expect("CS Direction");
cs.set_value(1).expect("CS Value set to 1");
//let cs = Pin::new(8); // BCM8
//cs.export().expect("cs export");
//while !cs.is_exported() {}
//cs.set_direction(Direction::Out).expect("CS Direction");
//cs.set_value(1).expect("CS Value set to 1");
let busy = Pin::new(17); // BCM17
busy.export().expect("busy export");
@ -92,7 +92,7 @@ fn main() -> Result<(), std::io::Error> {
// Initialise display controller
let mut delay = Delay {};
let controller = ssd1675::Interface::new(spi, cs, busy, dc, reset);
let controller = ssd1675::Interface::new(spi, busy, dc, reset);
let mut black_buffer = [0u8; ROWS as usize * COLS as usize / 8];
let mut red_buffer = [0u8; ROWS as usize * COLS as usize / 8];

View file

@ -80,12 +80,9 @@ pub trait DisplayInterface {
/// // Build the interface from the pins and SPI device
/// let controller = ssd1675::Interface::new(spi, cs, busy, dc, reset);
#[allow(dead_code)] // Prevent warning about CS being unused
pub struct Interface<SPI, CS, BUSY, DC, RESET> {
pub struct Interface<SPI, BUSY, DC, RESET> {
/// SPI interface
spi: SPI,
/// CS (chip select) for SPI (output)
cs: CS,
/// Active low busy pin (input)
busy: BUSY,
/// Data/Command Control Pin (High for data, Low for command) (output)
@ -94,19 +91,17 @@ pub struct Interface<SPI, CS, BUSY, DC, RESET> {
reset: RESET,
}
impl<SPI, CS, BUSY, DC, RESET> Interface<SPI, CS, BUSY, DC, RESET>
impl<SPI, BUSY, DC, RESET> Interface<SPI, BUSY, DC, RESET>
where
SPI: hal::blocking::spi::Write<u8>,
CS: hal::digital::v2::OutputPin,
BUSY: hal::digital::v2::InputPin,
DC: hal::digital::v2::OutputPin,
RESET: hal::digital::v2::OutputPin,
{
/// Create a new Interface from embedded hal traits.
pub fn new(spi: SPI, cs: CS, busy: BUSY, dc: DC, reset: RESET) -> Self {
pub fn new(spi: SPI, busy: BUSY, dc: DC, reset: RESET) -> Self {
Self {
spi,
cs,
busy,
dc,
reset,
@ -114,9 +109,6 @@ where
}
fn write(&mut self, data: &[u8]) -> Result<(), SPI::Error> {
// Select the controller with chip select (CS)
// self.cs.set_low();
// Linux has a default limit of 4096 bytes per SPI transfer
// https://github.com/torvalds/linux/blob/ccda4af0f4b92f7b4c308d3acc262f4a7e3affad/drivers/spi/spidev.c#L93
if cfg!(target_os = "linux") {
@ -134,11 +126,9 @@ where
}
}
impl<SPI, CS, BUSY, DC, RESET> DisplayInterface for Interface<SPI, CS, BUSY, DC, RESET>
impl<SPI, BUSY, DC, RESET> DisplayInterface for Interface<SPI, BUSY, DC, RESET>
where
SPI: hal::blocking::spi::Write<u8>,
CS: hal::digital::v2::OutputPin,
CS::Error: Debug,
BUSY: hal::digital::v2::InputPin,
DC: hal::digital::v2::OutputPin,
DC::Error: Debug,