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Add interface module
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12
Cargo.toml
12
Cargo.toml
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@ -4,3 +4,15 @@ version = "0.1.0"
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authors = ["Wesley Moore <wes@wezm.net>"]
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authors = ["Wesley Moore <wes@wezm.net>"]
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[dependencies]
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[dependencies]
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[dependencies.embedded-hal]
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features = ["unproven"]
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version = "0.2.2"
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[dependencies.embedded-graphics]
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optional = true
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version = "0.4.4"
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[features]
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default = ["graphics"]
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graphics = ["embedded-graphics"]
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@ -19,6 +19,7 @@ The library has been tested and confirmed working on these devices:
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## Credits
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## Credits
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* [Waveshare EPD driver](https://github.com/caemor/epd-waveshare)
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* [SSD1306 OLED display driver](https://github.com/jamwaffles/ssd1306)
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* [SSD1306 OLED display driver](https://github.com/jamwaffles/ssd1306)
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* [SSD1322 OLED display driver](https://github.com/edarc/ssd1322)
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* [SSD1322 OLED display driver](https://github.com/edarc/ssd1322)
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* [Pimoroni Python library for the Inky pHAT and Inky wHAT e-paper displays](https://github.com/pimoroni/inky)
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* [Pimoroni Python library for the Inky pHAT and Inky wHAT e-paper displays](https://github.com/pimoroni/inky)
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81
src/interface.rs
Normal file
81
src/interface.rs
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@ -0,0 +1,81 @@
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use hal;
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// Section 15.2 of the HINK-E0213A07 data sheet says to hold for 10ms
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const RESET_DELAY_MS: u8 = 10;
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struct DisplayInterface<SPI, CS, BUSY, DC, RESET> {
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/// SPI
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spi: SPI,
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/// CS for SPI
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cs: CS,
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/// Low for busy, Wait until display is ready!
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busy: BUSY,
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/// Data/Command Control Pin (High for data, Low for command)
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dc: DC,
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/// Pin for Reseting
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reset: RESET,
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}
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impl<SPI, CS, BUSY, DC, RESET> DisplayInterface<SPI, CS, BUSY, DC, RESET>
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where
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SPI: hal::blocking::spi::Write<u8>,
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CS: hal::digital::OutputPin,
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BUSY: hal::digital::InputPin,
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DC: hal::digital::OutputPin,
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RESET: hal::digital::OutputPin,
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{
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pub fn new(spi: SPI, cs: CS, busy: BUSY, dc: DC, reset: RESET) -> Self {
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Self {
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spi,
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cs,
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busy,
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dc,
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reset,
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}
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}
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fn reset<D: hal::blocking::delay::DelayMs<u8>>(&mut self, delay: &mut D) {
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self.reset.set_low();
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delay.delay_ms(RESET_DELAY_MS);
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self.reset.set_high();
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delay.delay_ms(RESET_DELAY_MS);
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}
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fn send_command(&mut self, command: u8) -> Result<(), SPI::Error> {
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self.dc.set_low();
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self.write(&[command])?;
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self.dc.set_high();
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Ok(())
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}
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fn send_data(&mut self, data: &[u8]) -> Result<(), SPI::Error> {
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self.dc.set_high();
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self.write(data)
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}
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fn write(&mut self, data: &[u8]) -> Result<(), SPI::Error> {
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// Select the controller with chip select (CS)
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self.cs.set_low();
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// Linux has a default limit of 4096 bytes per SPI transfer
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// https://github.com/torvalds/linux/blob/ccda4af0f4b92f7b4c308d3acc262f4a7e3affad/drivers/spi/spidev.c#L93
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if cfg!(target_os = "linux") {
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for data_chunk in data.chunks(4096) {
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self.spi.write(data_chunk)?;
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}
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} else {
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self.spi.write(data)?;
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}
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// Release the controller
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self.cs.set_high();
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Ok(())
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}
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fn busy_wait(&self) {
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while self.busy.is_high() {}
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}
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}
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@ -1,3 +1,7 @@
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extern crate embedded_hal as hal;
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mod interface;
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#[cfg(test)]
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#[cfg(test)]
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mod tests {
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mod tests {
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#[test]
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#[test]
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